ACM Comm 2011 10 Abstraction in Hardware System Design (Notes)

"Biology as Reactivity" CACM October 2011

Abstraction in Hardware System Design by Rishiyur S. Nikhil, p.36-44

Abstraction in Hardware System Design

"Applying lessons from software languages to hardware languages using Bluespec SystemVerilog."

How does this apply? It might be impossible to run Mutant OS on existing hardware. Thus the possible need for simulated hardware.

People

Stephen A. Edwards

Ideas

1. Bluespec SystemVerilog (BSV) address HDL short comings.
2. Hardware Description Language (HDL)
3. HDLs lag behind in
   1. Modern programming features like types, encapsulation, and parameterization.
   2. Modern hardware in using a uniprocessor von Newmann machine.
4. Commonly used HDLs, Verilog and VHDL date to the 1980s.
   1. Latest versions are SystemVerilog and SystemC.
   2. Their design is an event-driven model on a von Neumann Machine.
5. HDLs all have "synthesizable subsets" that constrain them in an effort to narrow the behavioral gap between
6. The only feasible solution is emulation, which simulates the hardware design in field-programmable gate arrays (FPGAs).
7. Simulation testing can take days or weeks at speeds from 10s to 100s KHz. MHz speeds are needed.
8. Transaction Level Modeling (TLM)
9. Verification Methodology Manual (VMM)
10. Emulation with FPGAs is needed.
11. In the design process from the very beginning, not just at the end.
12. What are the differences between a software language and a hardware language?
    1. Concurrency/Parallelism - Hardware systems typically have parallelism that is massive, fine-grain, heterogeneous, and reactive. Massive meaning in the millions.
    2. Architecture and Algorithm - Hardware they are one and the same. In software each is changeable to address the problem at hand.
13. Reactive Parallelism - Meaning, here, a parallel construct that reacts to events. Not chained to a clock-tick.
14. Architectural Transparency - expresses the idea that the source program directly reflects the desired architecture. Abstraction mechanisms can hide detail but should not distort the resulting architecture.
15. Non von Neumann - state and parallel state transitions. Called variously, Term Rewriting Systems, Guarded Atomic Actions, or Rewrite Rules. 13
16. Reactive Process - executes whenever its Boolean condition is true. Or other trigger condition.
    1. What if two Reactive Processes are triggered for a state they share? Which executes first?
       1. Choice 1 - An algorithm determines which executes first in order to produce a successful state.
       2. Choice 2 - The execution order does not matter. Either will produce a successful state.
       3. Choice 3 - The execution order does not matter. A successful or failure state is acceptable.

References

1. Edwards, S.A. The challenge of synthesizing hardware from C-like languages. IEEE Design and Test of Computers 23, 5 (2006). (See People above)
2. Klop, J. Term Rewriting Systems, vol. 2. Oxford University Press, 1992, 1–116.

Internal Links

Parent Article: Reading Notes